Novel Passive Negative and Positive Clamper Circuits Design for Electronic Systems

In this paper, models for negative and positive clamper circuits were developed. The models developed were simulated and data collected. Simulation results obtained showed that series capacitance needed to design negative clamper circuit was directly proportional to the duty cycle and period of the input signal. Considering the positive clamper circuit, the series capacitance is inversely proportional to the duty cycle and directly proportional to the period of the input signal. Looking at the parallel resistance, the parallel resistance needed to design negative clamper circuit is inversely proportional to the duty cycle but for positive clamper circuit, the parallel resistance is directly proportional to the duty cycle of the input signal. The models were also validated using Simscape and the results agreed. The models developed were simulated using Matrix Laboratory (MatLab).